From www.tomshardware.com

When AMD formally introduced its Zen 5-based Ryzen processors for desktops and laptops, it revealed a lot of details about the Zen 5 microarchitecture and capabilities of these CPUs. However, it didn’t disclose the actual die sizes and transistor counts of various Zen 5-based products — at least not to the U.S. press. In Germany, representatives for the company were kind enough to reveal this information to HardwareLuxx

Swipe to scroll horizontally

CodenameCoresDie SizeTransistor CountNodeTransistor Density
Ryzen 7000 ‘Durango’8 Zen 471 mm^26.5 billion5 nm92.9 MTr/mm^2
Ryzen 9000 ‘Eldora’8 Zen 570.6 mm^28.315 billionN4P117.78 MTr/mm^2
Hawk Point 18 Zen 4178 mm^2?N4 (?)? MTr/mm^2
Hawk Point 22 Zen 4 + 4 Zen 4c138 mm^2?N4 (?)? MTr/mm^2
Strix Point4 Zen 5 + 8 Zen 5c232.5 mm^2?N4P? MTr/mm^2

As it turns out, AMD’s ‘Eldora’ core complex die of the company’s Ryzen 9000-series processors packs 8.315 billion transistors, which is significantly more than the Durango Zen 4 CCD, which has 6.5 billion transistors. Yet, because Eldora is made on TSMC’s N4P (a 4nm-class) fabrication process, whereas Durango is produced using TSMC’s N5 (a 5nm-class) production node, their die sizes are similar—around 71 mm^2. 

AMD’s Ryzen 300 AI-series ‘Strix Point’ accelerated processing unit (APU) has a die size of 232.5 mm^2, which is massively larger than the Ryzen 7000 series ‘Hawk Point 1’ die, which is 178 mm^2. This is understandable, though, because both CPUs are made on 4nm-class manufacturing processes, but the new one packs four Zen 5 cores and eight Zen 5c cores along with 36 MB of L2+L3 cache. In contrast, the previous-generation APU integrates eight Zen 4 cores with 24 MB of L2+L3 cache. 

Since 2022, TSMC has been making chips on the N4P fabrication process for Apple and possibly some other players, so its yields should be decent, and performance variability should be relatively low. Therefore, AMD’s costs with a massive 232.5 mm^2 die size should be manageable. Furthermore, since N4P is a performance-enhanced version of TSMC’s N4 node, Strix Point’s power efficiency should be very high. Still, Strix Point will be the company’s largest APU in many years, which will affect its cost. 

That said, it is not surprising that AMD is reportedly prepping a smaller Strix Point version with a lower core count aimed at mainstream and lower-end notebooks. This APU will combine lower cost with higher power efficiency than its predecessors.

Get Tom’s Hardware’s best news and in-depth reviews, straight to your inbox.

[ For more curated Computing news, check out the main news page here]

The post AMD’s Zen 5 chips pack in 8.315 billion transistors per compute die, a 28% increase in density first appeared on www.tomshardware.com

New reasons to get excited everyday.



Get the latest tech news delivered right in your mailbox

You may also like

Subscribe
Notify of
0 Comments
Newest
Oldest Most Voted
Inline Feedbacks
View all comments

More in computing